SENSOR & DATA PROCESSING
From pixels and samples to real-time insight.
High-density camera ingest, PCIe capture cards and SoC instrumentation — co-designed from reference clock to host driver.
High-density camera ingest, PCIe capture cards and SoC instrumentation — co-designed from reference clock to host driver.
A compact mixed-signal FPGA platform for teams that need clean conversion, deterministic latency, and practical host integration without over-sizing the bill of materials.
Balanced performance for SDR and lab instrumentation: enough converter bandwidth for modern RF workflows, with a stable FPGA pipeline that is easy to integrate into existing Linux or Windows toolchains.
Industrial-grade SOMs co-designed with their carrier boards. Three Zynq-7000 variants (Z010/Z020/Z100) for ARM + FPGA embedded control and edge AI workloads, plus an Artix-7 variant (XC7A75T) for pure-FPGA wireless robot fleet control.
Zynq XC7Z010 dual ARM Cortex-A9 + 28 K logic cells in a compact stacking module. Sized for gateways that need real-time protocol conversion (Modbus, LoRa, BACnet, DALI) plus Linux networking on a single SoC.
Zynq XC7Z020 with 3× the logic capacity of the Z010 — 85 K cells, 220 DSP48E1 and 4.9 Mb BRAM. Right-sized for real-time video processing, machine-vision inference and multi-axis motion control.
Zynq XC7Z100 with 444 K logic cells, 2,020 DSP slices, 26.5 Mb BRAM and 16 GTX lanes. Built for applications that a Z020 simply cannot run — dual MIPI CSI-2 CNN inference, on-device training capture, and OTA model updates without bitstream reflash.
Xilinx Artix-7 XC7A75T pure-FPGA SOM in a compact stacking footprint. Purpose-built for wireless robot fleet control where a single operator commands many remote units in the field. Image will be published when production samples ship.
Every row below is a reference product we have either shipped or prototyped. Specs refer to the complete module + carrier pair; shared PS and PL IP is reused across variants so the porting cost is small.
| Product | SOM | Key interfaces | FPGA differentiator |
|---|---|---|---|
| Industrial IoT Gateway | NS_XC7Z010 | RS-485 Modbus, LoRa 433/868, ESP-01S Wi-Fi, 8-ch SPI ADC, 4-ch relay, 1-Wire | LoRa + Wi-Fi coexistence, analog ADC sampling, MQTT/OPC-UA bridging |
| BMS / Factory Gateway | NS_XC7Z010 | BACnet/Modbus RS-485, ADE9000 3-phase metering, DALI-2 lighting, 4-ch HVAC relay, PWM | Energy metering + DALI + PWM on one carrier expansion |
| Camera Streaming Gateway | NS_XC7Z010 | OV5640 DVP, ESP32 SPI Wi-Fi, KSZ9031 GbE, RTSP / HLS | DVP capture + wired + wireless streaming without daughter card |
| Smart Security Camera | NS_XC7Z020 | OV5640 DVP, dual-stream 1080p + 480p, ONVIF / RTSP, NVR to eMMC | PL hardware video pipeline, HW resize/CSC, dual-stream encode |
| License Plate / QR Access | NS_XC7Z020 | DVP camera, RS-485, Wiegand, IR illuminator, LCD, relay | PL image binarisation + ROI extraction, sub-200 ms decode-to-actuate |
| Laser Marking Controller | NS_XC7Z020 | Dual SPI DAC (galvo XY), laser TTL, encoder, RS-485 | PL real-time interpolation 1 MHz point rate, <1 µs laser jitter |
| Vision-Guided Pick & Place | NS_XC7Z100 | Dual IMX219 MIPI CSI-2 4-lane, 2× encoder, 4× PWM, MES over GbE | FPGA MIPI D-PHY + INT8 CNN <15 ms, on-device training, OTA deploy |
| Agricultural Robot Fleet | NS_XC7A75T | Sub-GHz long-range RF, GNSS, multi-channel PWM (drive / pumps / cutters), telemetry uplink | PL packet engine for many-robot fleet coordination, deterministic command timing without OS jitter |
| Hazardous-Site Remote Control | NS_XC7A75T | Long-range RF link, isolated RS-485, video downlink, sealed connectors | FPGA-handled link layer for low-latency teleoperation in hard-to-reach industrial sites |
| Sewer / Pipe Inspection Robot | NS_XC7A75T | DVP camera, LED PWM, crawler motor drivers, tether or wireless link | PL video pipeline + motor control on single FPGA — compact electronics for in-pipe deployment |
Most customers drop our boards in as the middle layer: they ingest from sensors or convert analog, process on-FPGA, and hand clean data to the host stack.
Cameras, ADCs, radar
Ingest + on-FPGA processing
Linux / RT · your app
No “datasheet-only” deliveries. Each platform ships with engineering-grade materials your integration team can use on day one.
Schematic (PDF+source), layout (ODB++), BOM, assembly drawing — for DFM reviews or cutting your own variant.
Python/C bring-up scripts, sample drivers, test harness. You can sample data into NumPy within 15 minutes of unboxing.
Named Newstart engineer for the first 90 days post-delivery — Slack, email, or call, no ticket queue.
Talk to our Singapore engineering team about your RF, FPGA/DSP, or AI inference project. We'll help you pick the right silicon and ship on time.